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march 2009 sensors target data sheet v 0.41 TLI5012 gmr-based angular sensor for rotary switches www..net
edition 2009-03 published by infineon technologies ag 81726 mnchen, germany ? 2008 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
TLI5012 target data sheet 3 v 0.41, 2009-03 we listen to your comments any information within this document that you feel is wrong, unclear or missing at all? your feedback will help us to continuously improve the quality of this document. please send your proposal (including a reference to this document) to: sensors@infineon.com TLI5012 gmr-based angular sensor revision history: 2009-03, v 0.41 previous version: v0.4 page subjects (major cha nges since last revision) general correction of typing errors gerneral name of product type changed 7 marking and ordering code added 12 figure 4 updated 14 figure 5 and figure 6 updated 15 magnetic induction reduced in table 3; storag e temperature reduced in table 2; note added 16 calculation of the junction temperature added 18 figure 7 updated 19 angle delay time with prediction in table 7 added; figure 8 updated 20 figure 9 and figure 10 updated 42 table 14, thermal resistance added
TLI5012 target data sheet 4 v 0.41, 2009-03 1 product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.3 application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5 functional block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5.1 internal power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5.2 oscillator and pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5.3 sd-adc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5.4 digital signal processing unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5.5 interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1 application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.3 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4.1 electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4.2 esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4.3 angle performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.4.4 signal processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.5 interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.5.1 synchronous serial communication (ssc) interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.5.1.1 ssc timing definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.5.1.2 ssc data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.5.1.3 registers chapter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.5.1.3.1 TLI5012 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.5.2 pulse width modulation interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.1 package parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.2 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.3 footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 4.4 packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 4.5 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
target data sheet 5 v 0.41, 2009-03 TLI5012 figure 1 sensitive bridges of the gmr sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 2 ideal output of the gmr sensor bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 3 pin configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 4 TLI5012 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5 application circuit for TLI5012 with ssc and pwm interface (using internal clk) . . . . . . . . . . . . 14 figure 6 application circuit for TLI5012 with only pwm interface (using inte rnal clk) . . . . . . . . . . . . . . . . 14 figure 7 TLI5012 signal path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 8 delay of sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 9 ssc configuration in sensor-slave mode with push-pull outputs (high speed application) . . . . 20 figure 10 ssc configuration in sensor-slave mode and open drain (safe bus systems) . . . . . . . . . . . . . 20 figure 11 ssc timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 12 ssc data transfer (data read example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 13 ssc data transfer (data write example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 14 ssc bit ordering (read example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 15 fast crc polynomial division circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 16 typical example for a pwm signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 figure 17 pg-dso-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 figure 18 footprint pg-dso-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 figure 19 tape and reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
TLI5012 target data sheet 6 v 0.41, 2009-03 table 1 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 2 absolute maximum ra tings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 3 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 4 electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 5 esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 6 angle performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 7 signal processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 8 ssc push-pull timing specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 9 ssc open drain timing specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 10 structure of the command word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 11 structure of the safety word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 12 registers overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 13 pwm interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 table 14 package parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
product type marking ordering code package TLI5012 i5012 sp000634318 pg-dso-8 TLI5012 target data sheet 7 v 0.41, 2009-03 1 product description 1.1 overview the TLI5012 is a 360 angle sensor that detects the orientation of a magnetic field. this is achieved by measuring sine and cosine angle components with monolithic i ntegrated g iant m agneto r esistance ( igmr ) elements. an angle error smaller than 5 will be achiev ed over temperature. data communications are accomplished with a bi-directional ssc interface that is spi compatible. the absolute angle value and other values are transmi tted via ssc or via a pulse-width-modulation (pwm) protocol. also the sine and cosine raw values can be read out. these raw signals are digitally processed internally to calculate the angle orientatio n of the magnetic field (magnet). the TLI5012 is a precalibrated sensor. the calibration param eters are stored in laser fuses. at start-up the values of the fuses are written into flip-flops, where these values can be changed by the application specific parameters.
TLI5012 product description target data sheet 8 v 0.41, 2009-03 1.2 features ? g iant m agneto r esistance (gmr)- based principle ? integrated magnetic field sensing for angle measurement ? full calibrated 0 - 360 angle measurement with revolution counter and angle speed measurement ? two separate highly accurate single bit sd-adc ? 15 bit representation of absolute angle value on the output (resolution of 0.01) ? bi-directional ssc interface up to 8mbit/s ? interfaces: ssc, pwm ? 0.25 m cmos technology ? temperature range: -40c to 125c (junction temperature) ? esd > 2kv (hbm) ? green package with lead-free (pb-free) plating 1.3 application example the TLI5012 gmr-based angular sensor is designed for ang ular position sensing in industrial applications, such as: ? rotary switch ? general angular sensing
TLI5012 functional description target data sheet 9 v 0.41, 2009-03 2 functional description 2.1 general the gmr sensor is implemented using vertical integr ation. this means that the gmr sensitive areas are integrated above the logic portion of the TLI5012 devi ce. these gmr elements change their resistance depending on the direction of the magnetic field. four individual gmr elements are connected to one w heatstone sensor bridge. these gmr elements sense one of two components of the applied magnetic field: ? x component, v x (cosine) or the ? y component, v y (sine) the advantage of a full-bridge structure is that the amplit ude of the gmr signal is doubled and temperature effects cancel out each other. figure 1 sensitive bridges of the gmr sensor note: in figure 1 , the arrows in the resistors symbolize the direct ion of the reference layer, which is used for the further explanation. the output signal of each bridge is only unambiguous over 180 between two maxima. therefore two bridges are orientated orthogonally to each other to measure 360. with the trigonometric function arctan, the true 360 angle value can be calulated which is represented by the relation of x and y signals. because only the relative values influence the result, the absolute size of the two signals is of minor importance. therefore, most influences to the amplitudes are compensated. v dd gnd adc x + gmr resistors adc x -adc y +adc y - v x v y 90 0 n s
TLI5012 functional description target data sheet 10 v 0.41, 2009-03 figure 2 ideal output of the gmr sensor bridges v angle 90 180 270 360 0 v x (cos) y component (sin) v y (sin) v y v x x component (cos)
TLI5012 functional description target data sheet 11 v 0.41, 2009-03 2.2 pin configuration figure 3 pin configuration (top view) 2.3 pin description table 1 pin description pin no. symbol in/out function 1 clk i external clock (must be connected to gnd for pwm output) 2 sck i ssc clock 3 csq i ssc chip select 4 data i/o ssc data 5ifa pwm o interface a: pwm 6v dd - supply voltage 7gnd-ground 8 ifb o interface b: could be remain open or connected via resistor to gnd 12 34 5 6 7 8 center of sensitive area
TLI5012 functional description target data sheet 12 v 0.41, 2009-03 2.4 block diagram figure 4 TLI5012 block diagram 2.5 functional block description 2.5.1 internal power supply the internal stages of the TLI5012 are supplied with different voltage regulators. ? gmr voltage regulator vrg ? analog voltage regulator vra ? digital voltage regulato r vrd (derived from vra) these regulators are directly connected to the supply voltage v dd . 2.5.2 oscillator and pll the internal frequen cy oscillator feeds the p hase l ocked l oop ( pll ). also the external clock (clk) can be used therefore. 2.5.3 sd-adc the sd-adcs transform the analog gmr-voltages and temperature-voltage into the digital domain. x gmr y gmr sd- adc sd- adc digital signal processing vrg vra vrd ssc interface fuses cordic ifa gnd data sck clk csq TLI5012 vdd sd- adc pwm osc pll ifb temp ccu
TLI5012 functional description target data sheet 13 v 0.41, 2009-03 2.5.4 digital signal processing unit the digital signal processing unit (dspu) contains the: ? c apture c ompare u nit ( ccu ), which is used to generate the pwm signal ? co ordinate r otation di gital c omputer ( cordic ), which contains the trigonometric function for angle calculation ? fuses, which contain the calibration parameters 2.5.5 interfaces different interfaces can be selected: ? ssc interface ?pwm
TLI5012 specification target data sheet 14 v 0.41, 2009-03 3 specification 3.1 application circuit the application circuit in figure 5 and figure 6 show the different communica tion possibilities of TLI5012. figure 5 application circuit for TLI5012 with ssc and pwm interface (using internal clk) figure 5 shows a basic block-diagram of the TLI5012 with pwm- interface. th is interface is selectable by connecting clk to gnd. additionally to the pwm the ssc interface could be used. within the ssc- interface the pwm mode is selectable between push-pull and open drain. figure 6 application circuit for TLI5012 with only pwm interface (using internal clk) 100 n ifa (pwm) data csq sck clk x gmr y gmr sd- adc sd- adc digital signal processing vrg vra vrd ssc interface fuses cordic pll vdd (3.0 ? 5.5v) TLI5012 sd- adc pw m osc temp ccu *) 1 k ? ssc pwm * recommended , e.g . 470 ? ifb gnd 10 k ? ifb could be remain open or connected via 10 k ? resistor to gnd. 1 k ? 100 n ifa (pwm) ifb gnd data csq sck clk x gmr y gmr sd- adc sd- adc digital signal processing vrg vra vrd ssc interface fuses cordic pll vdd (3.0 ? 5.5v) TLI5012 sd - adc pwm osc temp ccu 10 k ? 1 k ? 10 k ? data and ifb could be remain open or connected via 10 k ? resistor to gnd .
TLI5012 specification target data sheet 15 v 0.41, 2009-03 3.2 absolute maximum ratings attention: stresses above the max. values listed here may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the device. 3.3 operating range the following operating conditions must not be exceeded in order to ensure correct operation of the tle5012. all parameters specified in the followi ng sections refer to these operating conditions, unless otherwise noticed. note: the thermal resistances listed in table 14 ?package parameters? on page 42 must be used to calculate the corresponding ambient temperature. table 3 is valid for -40c < t j < 125c. table 2 absolute maximum ratings parameter symbol values unit note / test condition min. typ. max. voltage on v dd pin respect to ground (v ss ) v dd -0.5 - 6.5 v max 40 h/lifetime voltage on any pin respect to ground (v ss ) v in -0.5 - 6.5 v additionally v dd + 0.5 v may not be exceeded junction temperature t j -40 - 125 c - - 125 c for 3000h not additive magnetic field induction b - - ? 125 ? mt max. 5 min @ t a = 25c - - ? 100 ? max. 5 h @ t a = 25c storage temperature t st -40 - 125 c table 3 operating range parameter symbol values unit note / test condition min. typ. max. supply voltage v dd 3.0 5.0 5.5 v 1) 1) directly blocked with 100nf ceramic capacitor output current (data-pad) i q - - -25 ma pad_drv =?0x?, sink current 2) 2) max. current to gnd over open drain output - - -5 pad_drv =?10?, sink current 2) - - -0.4 pad_drv =?11?, sink current 2) output current (ifa / ifb-pad) i q - - -15 ma pad_drv =?0x?, sink current 2) - - -5 pad_drv =?1x?, sink current 2) input voltage v in -0.3 - 5.5 v v dd + 0.3 v may not be exceeded magnetic induction b xy 30 - 50 mt in x/y direction 3) 3) values refer to an homogenous magnetic field (b xy ) without vertical magnetic induction (b z = 0mt). angle range ang 0 - 360
TLI5012 specification target data sheet 16 v 0.41, 2009-03 calculation of the junction temperature the total power dissipation p tot of the chip increases its temper ature above the ambient temperature. the power multiplied by the total thermal resistance r thja (junction to ambient) leads to the final junction temperature. r thja is the sum of the addition of th e values of the two components junction to case and case to ambient . (1) example (assuming no load on v out ): (2) for moulded sensors, the calculation with r thjc is more adequate. out out dd dd thja tot thja a j thca thjc thja i v i v r p r t t t t r r r + = = ? ? + = + = ( (i dd , i out > 0, if direction is into ic) [] [] [ ] k va a v w k t ma i v v dd dd 9 0 012 . 0 5 150 12 5 = + ? ? ? ? ? ? = ? = =
TLI5012 specification target data sheet 17 v 0.41, 2009-03 3.4 characteristics 3.4.1 electrical parameters the indicated electrical parameters apply to the full oper ating range, unless otherwise sp ecified. the typical values correspond to a supply voltage v dd = 5.0 v and 25 c, unless individually sp ecified. all other values correspond to -40 c < t j < 125c. 3.4.2 esd protection table 4 electrical parameters parameter symbol values unit note / test condition min. typ. max. supply current i dd - 12 13 ma por level v por 2.0 - 2.9 v power on reset por hysteresis v porhy - 30 - mv power on time t pon - 4 5 ms v dd > v ddmin 1) 1) within ?power on time? write access is not permitted input signal low level v l - - 0.3 v dd v input signal high level v h 0.7 v dd - - v pull-up current i pu -10 - -225 a csq -10 - -150 data pull-down current i pd 10 - 225 a sck 10 - 150 a clk, ifa, ifb output signal low level v ol - - 1 v data; i q = - 25 ma (pad_drv=?0x?), i q = - 5 ma (pad_drv=?10?), i q = - 0.4 ma (pad_drv=?11?) - - 1 ifa,ifb; i q = - 15 ma (pad_drv=?0x?), i q = - 5 ma (pad_drv=?1x?) table 5 esd protection parameter symbol values unit notes min. max. esd voltage v hbm - 2.0 kv human body model 1) 1) human body model (hbm) according to: jedec eia/jesd22-a114-b v sdm - 0.5 kv socketed device model 2) 2) socketed device model (sdm) ac cording to: esd ass.std.ds5.3-93
TLI5012 specification target data sheet 18 v 0.41, 2009-03 3.4.3 angle performance after internal calculation the sensor has a remaining error, as shown in table 6 . the error value refers to b z = 0mt and the operating conditions given in table 3 ?operating range? on page 15 . the overall angle error represents the relative angle error. this error describes the deviation to the reference line after zero angle definition. 3.4.4 signal processing the signal path of the TLI5012 is depicted in figure 7 . it consists of the gmr-bridge, adc, filter and angle calculation. depending on the filter co nfiguration a different total delay time is achieved. additional to this delay time, the delay time of the interface has to be consider ed. the delay time leads to an additional angle error at higher speeds. with enabling the predicti on, the signal delay time will be reduced ( figure 8 ). figure 7 TLI5012 signal path at fir_md = 0 only raw values can be read out, due to the more time consuming angle calculation. table 6 angle performance parameter symbol values unit note / test condition min. typ. max. overall angle error err - 0.7 1) 1) at 25c, b =30 mt 5.0 including temperature drift 2)3) 2) including hysteresis error, caused by revolution direction change. 3) with magnetic setup in chip production (fused calibration parameters); rela tive error after zero angle definition. table 7 signal processing parameter symbol values unit note / test condition min. typ. max. update rate at interface t upd - 21.3 - s fir_md = 0 (only raw values) 1)2) - 42.7 - fir_md = 1 1) 2) - 85.3 - fir_md = 2 (default) 1) 2) - 170.6 - fir_md = 3 1) 2) x gmr y gmr sd- adc sd- adc angle calculation filter filter TLI5012 microcontrolle r if del t delif t upd t
TLI5012 specification target data sheet 19 v 0.41, 2009-03 figure 8 delay of sensor output angle delay time 3) t del - 60 70 s fir_md = 1 1) 2) - 80 95 fir_md = 2 1) 2) - 120 140 fir_md = 3 1) 2) angle delay time with prediction 3) t del - 20 30 s fir_md = 1; predict = 1 1) 2) - 5 20 fir_md = 2; predict = 1 1) 2) - -40 -20 fir_md = 3; predict = 1 1) 2) angle noise n angle - 0.11 - fir_md = 0, (1 sigma) 2) - 0.08 - fir_md = 1, (1 sigma) 2) - 0.05 - fir_md = 2, (1 sigma) 2) (default) - 0.04 - fir_md = 3, (1 sigma) 2) 1) depends on internal oscillator frequency variation 2) guaranteed by laboratory characterization 3) valid at constant rotation speed table 7 signal processing parameter symbol values unit note / test condition min. typ. max. time angle with prediction without prediction t del t upd magnetic field direction
TLI5012 specification target data sheet 20 v 0.41, 2009-03 3.5 interfaces 3.5.1 synchronous serial co mmunication ( ssc) interface the 3-pin ssc interface has a bi-directional push-pull data line, serial clock signal and chip select. the ssc interface is designed to communicate with a microcontroller pear to pear for fast applications. figure 9 ssc configuration in sensor-slave mode with push-pull outputs (high speed application) another possibility is a 3-pin ssc interface with bidirecti onal open-drain data line, serial cloc k signal and chip select. this setup is designed to commu nicate with a microcontroller in a bus system, together with other ssc slaves (e.g. two TLI5012 for redundancy reasons) . this mode can be activated using bit ssc_od. figure 10 ssc configuration in sensor-slave mode and open drain (safe bus systems) ssc communication for pear to pear data transmission between TLI5012 and c shift reg. shift reg. clock gen. data mrst mtsr sck sck (ssc slave) TLI5012 c (ssc master) csq csq **) *) *) en en *) opional , e .g. 100 ? **) opional , e .g . 470 ? shift reg. shift reg. clock gen. data mrst mtsr sck sck (ssc slave) TLI5012 c (ssc master) csq csq *) *) *) *) typ . 1k ? *) opional , e .g. 100 ?
TLI5012 specification target data sheet 21 v 0.41, 2009-03 3.5.1.1 ssc timing definition figure 11 ssc timing ssc inactive time (cs off ) the ssc inactive time defines the delay time after a transfer before the tle5012 can be selected again. table 8 ssc push-pull timing specification parameter symbol values unit note / test condition min. typ. max. ssc baud rate f ssc - 8.0 - mbit/s csq setup time t css 105 - - ns csq hold time t csh 105 - - ns csq off t csoff 600 - - ns ssc inactive time sck period t sckp 120 125 - ns sck high t sckh 40 - - ns sck low t sckl 30 - - ns data setup time t datas 25 - - ns data hold time t datah 40 - - ns write read delay t wr_delay 130 - - ns table 9 ssc open drain timing specification parameter symbol values unit note / test condition min. typ. max. ssc baud rate f ssc - 2.0 - mbit/s pull-up resistor = 1k ? csq setup time t css 300 - - ns csq hold time t csh 400 - - ns csq off t csoff 600 - - ns ssc inactive time sck period t sckp 500 - - ns sck high t sckh - 190 - ns sck t css t sckp t sckh t csh csq t sckl t csoff t datas data t datah
TLI5012 specification target data sheet 22 v 0.41, 2009-03 3.5.1.2 ssc data transfer the ssc data transfer is word aligned. the following transfer words are possible: ? command word (to access and change operating modes of the TLI5012) ? data words (any data transferred in any direction) ? safety word (confirms the data transfer and provide status information) figure 12 ssc data transfer (data read example) figure 13 ssc data transfer (data write example) sck low t sckl - 190 - ns data setup time t datas 25 - - ns data hold time t datah 40 - - ns write read delay t wr_delay 130 - - ns table 9 ssc open drain timing specification (cont?d) parameter symbol values unit note / test condition min. typ. max. command read data 1 read data 2 safety-word ssc-master is driving data ssc-slave is driving dat a t wr_delay command write data 1 safety-word ssc-master is driving data ssc-slave is driving dat a t wr_delay
TLI5012 specification target data sheet 23 v 0.41, 2009-03 command word theTLI5012 is controlled by a command word. it is sent first at every data transmission. safety word the safety word contains following bits: table 10 structure of the command word name bits description rw [15] read - write 0:write 1:read lock [14..11] 4 bit lock value 0x00: default operating access 0x02: config- access upd [10] update-register access 0: access to current values 1: access to updated values addr [9..4] 6 bit address nd [3..0] 4 bit number of data-words table 11 structure of the safety word name bits description stat chip and interface status [15] indication of chip-reset (resets after readout) via ssc 0: no reset 1: reset occurred reset: 0 b [14] system error (e.g. overvoltage; undervoltage; v dd -, gnd- off; rom;...) 0: no error 1: error occurred (s_v r; s_dspu; s_ov; s_xyol: s_magol; s_adcm) [13] interface access error (access to wrong address; wrong lock) 0: no error 1: error occurred [12] valid angle value (no system error; no interface error; no_gmr_a = ?0?; no_gmr_xy=?0?) 0: angle value valid 1: angle value invalid resp [11..8] sensor number response indicator the sensor no. bit is pulled low and the other bits are high. crc [7..0] cyclic redundancy check (crc)
TLI5012 specification target data sheet 24 v 0.41, 2009-03 data communication via ssc figure 14 ssc bit ordering (read example) the data communication via ssc interface has the following characteristic: ? the data transmission order is ?m ost significant bit (msb) first?. ? data is put on the data line wi th the rising edge on sck and r ead with the fa lling edge on sck. ? the ssc interface is word-aligned. all functions are activated after each transmitted word. ? a ?high? condition on the negated chip select pin (csq) of the selected tle5012 interrupts the transfer immediately. the crc calculat or is automatically reset. ? after changing the data direction, a delay (t wr_delay ) has to be considered before continuing the data transfer. this is necessary for in ternal register access. ? every access to the TLI5012 wi th the number of data (nd) 1 is performed with address auto-increment. ? at an overflow at address 3f h the transfer continuous at address 00 h . ? with nd = 0 no auto-increment is done and a continuous ly readout of the same address can be realized. afterwards no safety word is send and the transfer ends with high condition on csq. ? after every data transfer with nd 1 the 16 bit safety word will be appe nded by the se lected TLI5012. ? at a rising edge of csq without data transfer before (no sck-pulse), the update-registers are updated with according values. ? after sending the safety word the transfer ends. to start another data transfer, the csq has to be deselected once for t csoff . ? the ssc is default push-pull. the push-pull driver is only active, if the TLI5012 ha s to send data, otherwise the push-pull is disabled for receiving data from the microcontroller. cyclic redundancy check (crc) ? this crc is according to the j1850 bus-specification. ? every new transfer rese ts the crc generation. ? every byte of a transfer will be taken into account to generate th e crc (also the sent command(s)). ? generator-polynomial: x8+x4+x3+x2+1, but for the c rc generation the fast-crc generation circuit is used (see figure 15 ) ? the remainder of the fast crc ci rcuit is initial set to ?11111111 b ?. ? remainder is inverted before transmission. figure 15 fast crc polynomial division circuit sck data 8 11 10 9 msb 14 13 12 csq ssc transfer lsb 321 7 6 5 4 command word data word (s) ssc -master is dr iving dat a ssc -slave is driving dat a lsb 1 rw addr length lock msb t wr _delay upd xor x7 x6 x5 x4 x3 x2 xor x0 xor xor input serial crc output & tx_crc 1111 1 1 1 1 x1 parallel remainder
TLI5012 specification target data sheet 25 v 0.41, 2009-03 3.5.1.3 registers chapter this chapter defines the registers of the TLI5012 . it also defines the read/write access rights of the specific registers. table 12 identifies the values with symbols. access to the registers is accomplished via the ssc interface. the register is addressed wordwise. table 12 registers overview register short name register long name offset address page number registers chapter , TLI5012 register stat status register 00 h 26 acstat activation status register 01 h 28 aval angle value register 02 h 29 aspd angle speed register 03 h 30 arev angle revolution register 04 h 30 fsync frame synchronization register 05 h 31 mod_1 interface mode1 register 06 h 32 sil sil register 07 h 33 mod_2 interface mode2 register 08 h 34 mod_3 interface mode3 register 09 h 35 offx offset x 0a h 36 offy offset y 0b h 36 synch synchronicity 0c h 37 ifab ifab register 0d h 37 mod_4 interface mode4 register 0e h 38 tco_y temperature coeffizient register 0f h 39 adc_x x-raw value 10 h 39 adc_y y-raw value 11 h 40
TLI5012 specification target data sheet 26 v 0.41, 2009-03 3.5.1.3.1 TLI5012 register status register stat offset reset value status register 00 h 8001 h field bits type description rd_st 15 r read status 0 b after readout 1 b status values changed reset: 1 b s_nr 14:13 r slave number reset: 00 b no_gmr_a 12 r no gmr angle value 0 b valid gmr angle value on the interface 1 b no valid gmr angle value on the interface reset: 0 b no_gmr_xy 11 r no gmr xy values 0 b valid gmr_xy values on the interface 1 b no valid gmr_xy values on the interface reset: 0 b s_rom 10 r status rom 0 b after readout, crc ok 1 b crc fail or running reset: 0 b s_adct 9 r status adc-test 0 b after readout 1 b test vectors out of limit reset: 0 b s_magol 7 r status magnitude out of limit 0 b after readout 1 b gmr-magnitude out of limit (>23230 digits) reset: 0 b u 5'b67 u 6b15 u 12b*05b $ u 12b*05b ;< u 6b520 u 6b$'&7 5hv u 6b0$*2/ u 6b;<2/ u 6b29 u 6b'638 u 6b)86( u 6b95 u 6b:' u 6b567
TLI5012 specification target data sheet 27 v 0.41, 2009-03 s_xyol 6 r status x,y data out of limit 0 b after readout 1 b x,y data out of limit (>23230 digits) reset: 0 b s_ov 5 r status overflow 0 b after readout 1 b dspu overflow occurred reset: 0 b s_dspu 4 r status digital signal processing unit 0 b after readout 1 b dspu self test not ok, or selftest is running reset: 0 b s_fuse 3 r status fuse crc 0 b after readout, fuse crc ok 1 b fuse crc fail reset: 0 b s_vr 2 r status voltage regulator 0 b after readout 1 b v dd overvoltage; v dd undervoltage; v dd -off; gnd- off; or v ovg ; v ova ; v ovd too high reset: 0 b s_wd 1 r status watchdog 0 b after chip reset 1 b watchdog counter expired reset: 0 b s_rst 0 r status reset 0 b after readout 1 b indication of power-up, short power-break or active reset reset: 1 b field bits type description
TLI5012 specification target data sheet 28 v 0.41, 2009-03 activation status register acstat offset reset value activation status register 01 h 5cee h field bits type description res 15:10 reserved reset: 010111 b as_adct 9 rw enable gmr vector check reset: 0 b as_vec_mag 7 rw activation of adc-redundancy-bist 0 b after execution 1 b activation of redundancy bist reset: 1 b as_vec_xy 6 rw activation of adc-bist 0 b after execution 1 b activation of bist reset: 1 b as_ov 5 rw enable of dspu overflow check reset: 1 b as_dspu 4 rw activation dspu bist 0 b after execution 1 b activation of dspu bist reset: 0 b as_fuse 3 rw activation fuse crc 0 b after execution 1 b activation of fuse crc reset: 1 b as_vr 2 rw enable voltage regulator check reset: 1 b as_wd 1 rw enable dspu watchdog-hw-reset reset: 1 b 5hv uz $6b$'&7 5hv uz $6b9(&b 0$* uz $6b9(&b ;< uz $6b29 uz $6b'638 uz $6b)86( uz $6b95 uz $6b:' uz $6b567
TLI5012 specification target data sheet 29 v 0.41, 2009-03 angle value register as_rst 0 rw activation of hardware reset activation occurs after csq sw itches from ?0? to ?1? after ssc transfer. 0 b after execution 1 b activation of hw reset reset: 0 b aval offset reset value angle value register 02 h 8000 h field bits type description rd_av 15 r read status, angle value 0 b after readout 1 b new angle value (ang_val) present reset: 1 b ang_val 14:0 r calculated angle value (ang_range = 0x080) 4000 h -180 0000 h 0 3fff h +179.99 reset: 0 h field bits type description u 5'b$9 u $1*b9$/ u $1*b9$/
TLI5012 specification target data sheet 30 v 0.41, 2009-03 angle speed register angle revolution register aspd offset reset value angle speed register 03 h 8000 h field bits type description rd_as 15 r read status, angle speed 0 b after readout 1 b new angle speed value (ang_spd) present reset: 1 b ang_spd 14:0 r calculated angle speed difference between two consecutive angle values. reset: 0 h arev offset reset value angle revolution register 04 h 8000 h u 5'b$6 u $1*b63' u $1*b63' u 5'b5(9 uz )&17 u 5(92/ u 5(92/
TLI5012 specification target data sheet 31 v 0.41, 2009-03 frame synchronization register field bits type description rd_rev 15 r read status, revolution 0 b after readout 1 b new value (revol) present reset: 1 b fcnt 14:9 rw frame counter (unsigned 6 bit value) counts every new angle value reset: 0 h revol 8:0 r number of revolutions (signed 9 bit value) reset: 0 h fsync offset reset value frame synchronization register 05 h 0000 h field bits type description fsync 15:9 rw frame synchronization counter value sub counter within one frame. reset: 0 h uz )6<1& 5hv 5hv
TLI5012 specification target data sheet 32 v 0.41, 2009-03 interface mode1 register mod_1 offset reset value interface mode1 register 06 h 8001 h field bits type description fir_md 15:14 rw filter decimation setting 00 b 21.3s 01 b 42.7s 10 b 85.3s 11 b 170.6s reset: 10 b clk_sel 4 rw clock source select 0 b internal oscillator 1 b external 4mhz clock reset: 0 b ssc_od 3 rw ssc-interface 0 b push-pull 1 b open drain reset: 0 b dspu_hold 2 rw hold dspu operation 0 b dspu in normal schedule operation 1 b dspu is on hold reset: 0 b res 1:0 reserved reset: 01 b uz ),5b0' 5hv 5hv uz &/.b6(/ uz 66&b2' uz '638b+2 /' 5hv
TLI5012 specification target data sheet 33 v 0.41, 2009-03 sil register sil offset reset value sil register 07 h 0000 h field bits type description filt_par 15 rw filter parallel 0 b filter parallel disabled 1 b filter parallel enabled (source: x-value) reset: 0 b filt_inv 14 rw filter inverted 0 b filter inverted disabled 1 b filter inverted enabled reset: 0 b fuse_rel 10 rw fuse reload 0 b fuse reload disabled 1 b fuse parameters reloaded to dspu at next cycle start reset: 0 b adctv_en 6 rw adc-test vectors 0 b adc-test vectors disabled 1 b adc-test vectors enabled reset: 0 b adctv_y 5:3 rw test vector y 000 b 0v 001 b +70% 010 b +100% 011 b +overflow 101 b -70% 110 b -100% 111 b -overflow reset: 000 b uz ),/7b3$ 5 uz ),/7b,1 9 5hv uz )86(b5( / 5hv 5hv uz $'&79b( 1 uz $'&79b< uz $'&79b;
TLI5012 specification target data sheet 34 v 0.41, 2009-03 interface mode2 register adctv_x 2:0 rw test vector x 000 b 0v 001 b +70% 010 b +100% 011 b +ov 101 b -70% 110 b -100% 111 b -ov reset: 000 b mod_2 offset reset value interface mode2 register 08 h 0800 h field bits type description ang_range 14:4 rw angle range angle range [] = 360 * (2 7 / ang_range) 200 h represents 90 080 h represents 360 reset: 080 h ang_dir 3 rw angle direction 0 b counterclockwise rotation of magnet 1 b clockwise rotation of magnet reset: 0 b field bits type description 5hv uz $1*b5$1*( uz $1*b5$1*( uz $1*b',5 5hv
TLI5012 specification target data sheet 35 v 0.41, 2009-03 interface mode3 register mod_3 offset reset value interface mode3 register 09 h 0000 h field bits type description ang_base 15:4 rw angle base 800 h -180 000 h 0 001 h 0.00879 7ff h +179.912 reset: 0 h spikef 3 rw analog spike filters of input pads 0 b spike filter disabled 1 b spike filter enabled reset: 0 b pad_drv 1:0 rw configuration of pad-driver 00 b ifa/ifb: strong driver, data: strong driver, fast edge 01 b ifa/ifb: strong driver, data: strong driver, slow edge 10 b ifa/ifb: weak driver, data: medium driver, fast edge 11 b ifa/ifb: weak driver, data: weak driver, slow edge reset: 00 b uz $1*b%$6( uz $1*b%$6( uz 63,.() 5hv uz 3$'b'59
TLI5012 specification target data sheet 36 v 0.41, 2009-03 offset x register offset y register offx offset reset value offset x 0a h 0000 h field bits type description x_offset 15:4 rw offset correction of x-value reset: 0 h offy offset reset value offset y 0b h 0000 h field bits type description y_offset 15:4 rw offset correction of y-value reset: 0 h uz ;b2))6(7 uz ;b2))6(7 5hv uz <b2))6(7 uz <b2))6(7 5hv
TLI5012 specification target data sheet 37 v 0.41, 2009-03 synchronicity register ifab register synch offset reset value synchronicity 0c h 0000 h field bits type description synch 15:4 rw amplitude synchronicity +2047 d 112.494% 0 d 100% -2047 d 87.500% reset: 0 h ifab offset reset value ifab register 0d h 0004 h field bits type description ortho 15:4 rw orthogonality correction of x and y components +2047 d 11.2445 0 d 0 -2047 d -11.2500 reset: 0 h uz 6<1&+ uz 6<1&+ 5hv uz 257+2 uz 257+2 5hv uz ,)$%b2' 5hv
TLI5012 specification target data sheet 38 v 0.41, 2009-03 interface mode4 register ifab_od 2 rw ifa & ifb open drain 0 b push-pull 1 b open drain reset: 1 b mod_4 offset reset value interface mode4 register 0e h 0011 h field bits type description tco_x_t 15:9 rw offset temperature coefficient for x-component reset: 0 h ifab_res 4:3 rw ifab resolution 00 b 12bit = 0.088 (244hz) 01 b 11bit = 0.176 (488hz) 10 b 10bit = 0.352 (977hz) 11 b 9bit = 0.703 (1953hz) reset: 10 b if_md 2:0 rw interface mode pwm if clk is connected to gnd at startup. note: not mentioned combinations are not allowed 001 b ssc mode; pwm reset: 001 b field bits type description uz 7&2b;b7 5hv 5hv uz ,)$%b5(6 uz ,)b0'
TLI5012 specification target data sheet 39 v 0.41, 2009-03 temperature coeffizient register x-raw value register tco_y offset reset value temperature coeffizient register 0f h 0000 h field bits type description tco_y_t 15:9 rw offset temperature coefficient for y-component reset: 0 h crc_par 7:0 rw crc of parameters crc of parameters from address 08 h to 0f h reset: 0 h adc_x offset reset value x-raw value 10 h 0000 h field bits type description adc_x 15:0 r adc value of x-gmr read out of this regi ster will update adc_y reset: 0 h uz 7&2b<b7 5hv uz &5&b3$5 u $'&b;
TLI5012 specification target data sheet 40 v 0.41, 2009-03 y-raw value register 3.5.2 pulse width modulation interface the p ulse w idth m odulation ( pwm ) update rate can be programmed within the register 0e h (ifab_res) in following steps: ? 0.25 khz with 12 bit resolution ? 0.5 khz with 11 bit resolution ? 1.0 khz with 10 bit resolution (default) ? 2.0 khz with 9 bit resolution pwm uses a square wave with constant frequency whose du ty cycle is modulated resu lting in an average value of the waveform. figure 16 shows the principle behavior of a pwm with different duty cycles and the definition of timing values. the duty cycle of a pwm is defined by following general formulas: (3) the range between 0 - 6.25% and 93.75 - 100% is used on ly for diagnostic purposes. more details are given in table 13 . adc_y offset reset value y-raw value 11 h 0000 h field bits type description adc_y 15:0 r adc value of y-gmr updated when adc_x or adc_y is read. reset: 0 h u $'&b< pwm pwm off on pwm pwm on t f t t t t t cycle duty 1 = + = =
TLI5012 specification target data sheet 41 v 0.41, 2009-03 figure 16 typical example for a pwm signal table 13 pwm interface parameter symbol values unit note / test condition min. typ. max. pwm output frequency f pwm 244 - 1953 hz selectable by ifab_res 1) 1) f pwm = (f dig * 2 ifab_res ) / (24 * 4096) output duty cycle range dy pwm 6.25 - 93.75 % absolute angle - 2 - % electrical error (s_rst; s_vr) - 98 - % system error (s_fuse; s_ov; s_xyol; s_magol; s_adct) 0 - 1 % short to gnd 99 - 100 % short to v dd , power-loss pwm period variation t pwmvar -5 - 5 % 2) 2) depends on internal oscillator frequency variation t on ?0' t on = high level off = low level duty cycle = 5% duty cycle = 50% duty cycle = 95% t pwm t off vdd u ifa vdd u ifa t ?0' t vdd u ifa ?0'
TLI5012 package information target data sheet 42 v 0.41, 2009-03 4 package information 4.1 package parameters 4.2 package outline figure 17 pg-dso-8 package dimension table 14 package parameters parameter symbol limit values unit notes min. typ. max. thermal resistance r thja - 150 200 k/w junction to air 1) 1) according to jedec jesd51-7 r thjc - - 75 k/w junction to case r thjl - - 85 k/w junction to lead soldering moisture level msl 3 260c lead frame cu plating sn 100% > 7 m p-pg-dso-08-16-s-po v03 1) does not include plastic or metal protrusion of 0.15 max. per side 2) lead width can be 0.61 max. in dambar area 3) max. 3? tilt of sensitive area to preference "b" 4) reference "d" is defined with the center of all 8 pins -0.06 +0.1 0.41 8x 1 4 8 1.27 5 a 0.1 0.2 m a (1.45) 0.175 ?.07 1.75 max. b b 6 ?.2 0.64 0.35 x 45? 0.19 +0.06 1) 2) 4) ?.25 8?max. 8x 0.2 m c 4 -0.2 1) 5 -0.2 1.22 ?.18 c 1.27 3 x = 3.81 0.75 d e e d a detail a sensitive center of area plane seating index marking ?.6 sensitive area 3) 0.32 min.
TLI5012 package information target data sheet 43 v 0.41, 2009-03 4.3 footprint figure 18 footprint pg-dso-8 4.4 packing figure 19 tape and reel 4.5 marking processing note: for processing recommendations, please refer to infineon?s notes on processing position marking description 1st line i5012xx see ordering table on page 7 2nd line xxx lot code 3rd line gxxxx g..green, 4-digit..date code 0.65 1.31 5.69 1.27 8 6.4 5.2 0.3 0.3 12 2.1 1.7 5
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